1. Field
The present teachings relate to power regulators. More particularly, the present teachings relates to leakage current reduction methods and apparatus in a power regulator.
2. Description of Related Art
Mobile communication devices such as mobile telephones are generally powered by batteries. Therefore, it is desirable to improve the time before the battery charge is depleted. One method of improving battery life is to reduce the unintended current leakage from power supply to electrical ground or other reference voltage in the radio. By reducing this wasted current, the useful time of the battery is increased. Integrated circuit power amplifiers often have a regulator function that adjusts the output power of the amplifier. In order to further conserve power, these power amplifiers are turned off when the radio is not transmitting.
When a power amplifier is operated in an OFF state, the regulator shuts off the power to the amplifier and it is desirable to shut off the current flow through the regulator to as close to zero current as possible. Conversely, when it is operated in an ON state, it is desirable for the regulator to have as little loss or voltage drop as possible to maximize power efficiency of the system.
An optimal regulator will therefore have very low leakage when OFF and very low loss when ON. One way to achieve low loss in the ON state is to use MOS transistors having low threshold voltage. When transistors with low threshold voltage are used, the “on” resistance of those transistors is decreased when they are operated in the ON state as compared to transistors having higher threshold voltage.
However, when MOS transistors of low threshold voltage are used in a regulator, and they are operated in the OFF state, they may have higher leakage current from source to drain because they are still in subthreshold operation when the gate to source voltage Vgs is equal to zero. Transistors with higher threshold voltage generally have lower leakage in the OFF state than transistors of lower threshold voltage.
As a mitigation effort to reduce leakage from source to drain in the regulator transistors, an increase in the drawn channel length may be attempted. However, increasing the channel length of the regulator transistors has only a weak effect on the leakage current and has a significant reduction of efficiency due to increased “on” resistance. The need for a low-leakage, high-efficiency regulator circuit is clear.
FIG. 1 shows Vgs as a function of log(Ids) for a MOS transistor. In sub-threshold operation, the dependency of Vgs on log(Ids) is linear. Two different points P1 and P2 are taken on the sub-threshold portion of the curve, to define a ΔVgs and a Δ log Ids. A sub-threshold swing S can be defined as the reciprocal of the slope Δ log Ids/ΔVgs, i.e. S=ΔVgs/Δ log Ids. S is usually measured in millivolts per decade of Δ log Ids, i.e. mV/decade. For example, a sub-threshold swing S of 100 mV/decade means that a change in Vgs of 100 mV will result in a change in Ids of one decade (10×).
FIG. 2 shows a prior art arrangement of a power amplifier with voltage regulator. The voltage regulator of FIG. 2 comprises a p-channel MOS (202) located on top of a power amplifier PA (250). Regulator transistor (202) regulates the voltage output Vout_reg (206) of the power amplifier (250). Regulator transistor (202) can be in an ON condition—power supply Vdd (208) connected with the power amplifier (250)—or an OFF condition—power supply Vdd (208) disconnected from the power amplifier (250). The voltage signal Vbias (204) biases the regulator transistor (202) into the ON condition or the OFF condition.
In particular, when Vbias (204) increases towards the power supply Vdd (208), regulator transistor (202) starts to turn off, increasing its “on” resistance. As the “on” resistance of regulator transistor (202) increases, its source to drain voltage Vds increases. This causes a decrease in the regulated voltage output Vout_reg (206). The decrease in Vout_reg (206) reduces the amplification of the power amplifier (250). Conversely, when Vbias (204) decreases towards Vref (210), the regulator transistor (202) turns on, reducing its “on” resistance, thereby decreasing its Vds and increasing Vout_reg (206). This results in higher amplification of the power amplifier (250).
When the regulator transistor (202) is biased into the OFF condition, the Vgs of regulator transistor (202) is typically 0V, because the gate input voltage Vbias (204) is set to the power supply Vdd. If the p-channel regulator transistor (202) has a threshold voltage of 0.4V and a sub-threshold swing of 100 mV/decade, then the transistor (202) is passing a subthreshold current Ids at a current value of 4 decades below threshold.
Regulator transistors are typically very wide (in terms of the distance perpendicular to the current flow direction in the transistor), in order to minimize their resistance in the ON state. As an example, it can be assumed that the regulator transistor (202) has a total width of 100 mm and passes current at a rate of 20 mA per millimeter of width at threshold. Then the total current in the OFF condition is 100 mm×20 mA/mm width×1 E−4=200 μA. A leakage current of 200 μA in the OFF condition is a significant battery drain and would be too high for practical use.